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? semiconductor components industries, llc, 2013 july, 2013 ? rev. 2 1 publication order number: NCP706/d NCP706 1a, 1% precision very low dropout voltage regulator with enable the NCP706 is a very low dropout regulator which provides up to 1 a of load current and maintains excellent output voltage accuracy of 1% including line, load and temperature variations. the operating input voltage range from 2.4 v up to 5.5 v makes this device suitable for li ? ion battery powered products as well as post ? regulation applications. the product is available in 2.1 v and 2.2 v fixed output voltage options. NCP706 is fully protected against overheating and output short circuit. very small 8 ? pin xdfn8 1.6 x 1.2, 04p package makes the device especially suitable for space constrained portable applications such as tablets and smartphones. features ? operating input voltage range: 2.4 v to 5.5 v ? fixed output voltage option: 2.1 v, 2.2 v other output voltage options available on request. ? low quiescent current of typ. 200 a ? very low dropout: 300 mv max. at i out = 1 a ? 1% accuracy over load/line/temperature ? high psrr: 60 db at 1 khz ? internal soft ? start to limit the inrush current ? thermal shutdown and current limit protections ? stable with a 4.7 f ceramic output capacitor ? available in xdfn8 1.6 x 1.2, 04p 8 ? pin package ? these are pb ? free devices typical applications ? tablets, smartphones, ? wireless handsets, portable media players ? portable medical equipment ? other battery powered applications figure 1. typical application schematic NCP706 in en out gnd off on v out = 2.1 (2.2) v @ 1 a c out 4.7 f ceramic c in v in = 2.4 (2.5) ? 5.5 v sns xdfn8 case 711as marking diagram http://onsemi.com see detailed ordering and shipping information on page 11 of this data sheet. ordering information pin connection (top view) xx = specific device code m = date code = pb ? free package xxm (*note: microdot may be in either location) 1 2 3 4 1 2 3 4 8 7 6 5 8 7 6 5 in in en gnd out out n/c sns (bottom view) in in en gnd out out n/c sns
NCP706 http://onsemi.com 2 figure 2. simplified internal schematic block diagram pin function description pin no. xdfn8 pin name description 1 out regulated output voltage. a minimum 4.7 f ceramic capacitor is needed from this pin to ground to assure stability. 2 out 3 n/c not connected. this pin can be tied to ground to improve thermal dissipation. 4 sns remote sense connection. this pin should be connected to the output voltage rail. 5 gnd power supply ground. 6 en enable pin. driving en over 0.9 v turns on the regulator. driving en below 0.4 v puts the regulator into shutdown mode. 7 in input pin. a small capacitor is needed from this pin to ground to assure stability. 8 in ? exposed pad this pad enhances thermal performance and is electrically connected to gnd. it is recommended that the exposed pad is connected to the ground plane on the board or otherwise left open.
NCP706 http://onsemi.com 3 absolute maximum ratings rating symbol value unit input voltage (note 1) v in ? 0.3 v to 6 v v output voltage v out ? 0.3 v to v in + 0.3 v v enable input v en ? 0.3 v to v in + 0.3 v v output short circuit duration t sc indefinite s maximum junction temperature t j(max) 125 c storage temperature t stg ? 55 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristis and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per eia/jesd22 ? a114 esd machine model tested per eia/jesd22 ? a115 latch ? up current maximum rating tested per jedec standard: jesd78 thermal characteristics rating symbol value unit thermal characteristics, xdfn8 1.6x1.2, 04p thermal resistance, junction ? to ? air r ja 160 c/w
NCP706 http://onsemi.com 4 electrical characteristics ? voltage version 2.1 v ? 40 c t j 125 c; v in = v out(nom) + 0.3 v or 2.4 v, whichever is greater; i out = 10 ma, c in = c out = 4.7 f, v en = 0.9 v, unless otherwise noted. typical values are at t j = +25 c. (note 3) parameter test conditions symbol min typ max unit operating input voltage v in 2.4 5.5 v undervoltage lock ? out v in rising uvlo 1.2 1.6 1.9 v output voltage accuracy v out + 0.3 v v in 4.5 v, i out = 0 ? 1 a v out 2.079 2.10 2.121 v line regulation v out + 0.3 v v in 4.5 v, i out = 10 ma reg line 2 mv load regulation i out = 0 ma to 1 a reg load 2 mv load transient i out = 10 ma to 1a or 10 ma to 1 a in 10 s, c out = 10 f tran load 120 mv dropout voltage (note 4) i out = 1 a, v out(nom) = 2.1 v v do 300 mv output current limit v out = 90% v out(nom) i cl 1.1 a quiescent current i out = 0 ma i q 180 230 a ground current i out = 1 a i gnd 200 a shutdown current v en 0 v, v in = 2.0 to 5.5 v 0.1 1 a reverse leakage current in shutdown v in = 5.5 v, v out = v out(nom) , v en < 0.4 v i rev 1.5 5 a en pin high threshold en pin low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 0.9 0.4 v v en pin input current v en = 5.5 v i en 100 500 na turn ? on time c out = 4.7 f, from assertion en pin to 98% v out(nom) t on 200 s power supply rejection ratio v in = 2.6 v, v out = 2.1 v i out = 0.5 a f = 100 hz f = 1 khz f = 10 khz psrr 60 60 40 db output noise voltage v out = 2.1 v, v in = 2.6 v, i out = 0.5 a f = 100 hz to 100 khz v noise 280 v rms thermal shutdown temperature temperature increasing from t j = +25 c t sd 160 c thermal shutdown hysteresis temperature falling from t sd t sdh ? 20 ? c 3. performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 4. characterized when v out falls 100 mv below the regulated voltage at v in = v out(nom) + 0.3 v.
NCP706 http://onsemi.com 5 electrical characteristics ? voltage version 2.2 v ? 40 c t j 125 c; v in = v out(nom) + 0.3 v or 2.5 v, whichever is greater; i out = 10 ma, c in = c out = 4.7 f, v en = 0.9 v, unless otherwise noted. typical values are at t j = +25 c. (note 5) parameter test conditions symbol min typ max unit operating input voltage v in 2.5 5.5 v undervoltage lock ? out v in rising uvlo 1.2 1.6 1.9 v output voltage accuracy v out + 0.3 v v in 4.5 v, i out = 0 ? 1 a v out 2.178 2.2 2.222 v line regulation v out + 0.3 v v in 4.5 v, i out = 10 ma reg line 2 mv load regulation i out = 0 ma to 1 a reg load 2 mv load transient i out = 10 ma to 1a or 10 ma to 1 a in 10 s, c out = 10 f tran load 120 mv dropout voltage (note 6) i out = 1 a, v out(nom) = 2.2 v v do 300 mv output current limit v out = 90% v out(nom) i cl 1.1 a quiescent current i out = 0 ma i q 180 230 a ground current i out = 1 a i gnd 200 a shutdown current v en 0 v, v in = 2.0 to 5.5 v 0.1 1 a en pin high threshold en pin low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 0.9 0.4 v en pin input current v en = 5.5 v i en 100 500 na turn ? on time c out = 4.7 f, from assertion en pin to 98% v out(nom) t on 200 s power supply rejection ratio v in = 3.2 v, v out = 2.2 v i out = 0.5 a f = 100 hz f = 1 khz f = 10 khz psrr 55 70 60 db output noise voltage v out = 2.2 v, v in = 2.7 v, i out = 0.5 a f = 100 hz to 100 khz v noise 300 v rms thermal shutdown temperature temperature increasing from t j = +25 c t sd 160 c thermal shutdown hysteresis temperature falling from t sd t sdh ? 20 ? c 5. performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 6. characterized when v out falls 100 mv below the regulated voltage at v in = v out(nom) + 0.3 v.
NCP706 http://onsemi.com 6 typical characteristics 2.090 2.092 2.094 2.096 2.098 2.100 2.102 ? 40 ? 20 0 20 40 60 80 100 120 temperature ( c) figure 3. output voltage vs. temperature v in = 2.4 v i out = 10 ma c out = 4.7 f v out(nom) = 2.1 v output voltage (v) 2.184 2.188 2.192 2.196 2.200 2.204 2.208 ? 40 ? 20 0 20 40 60 80 100 120 temperature ( c) figure 4. output voltage vs. temperature output voltage (v) v in = 2.5 v i out = 10 ma c out = 4.7 f v out(nom) = 2.2 v output voltage (v) 0.0 0.4 0.8 1.2 1.6 2.0 2.4 0.0 1.0 2.0 3.0 4.0 5.0 v in = v en t a = 25 c c out = 4.7 f v out(nom) = 2.1 v input voltage (v) i out = 10 ma i out = 50 ma i out = 250 ma i out = 500 ma figure 5. output voltage vs. input voltage output voltage (v) 0.0 0.4 0.8 1.2 1.6 2.0 2.4 0.0 1.0 2.0 3.0 4.0 5.0 input voltage (v) figure 6. output voltage vs. input voltage i out = 10 ma i out = 50 ma i out = 250 ma i out = 500 ma v in = v en t a = 25 c c out = 4.7 f v out(nom) = 2.2 v 140 160 180 200 220 240 260 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 input voltage (v) figure 7. quiescent current vs. input voltage quiescent current ( a) i out = 0 c out = 4.7 f v out(nom) = 2.1 v t a = 25 c t a = ? 40 c t a = 125 c 120 140 160 180 200 220 240 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 input voltage (v) figure 8. quiescent current vs. input voltage quiescent current ( a) t a = 25 c t a = ? 40 c t a = 125 c i out = 0 c out = 4.7 f v out(nom) = 2.2 v
NCP706 http://onsemi.com 7 typical characteristics 140 160 180 200 220 240 260 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v in = 2.4 v v in = 4.0 v v in = 5.5 v v in = 3.0 v v in = 5.0 v ground current ( a) output current (a) figure 9. ground current vs. output current c out = 4.7 f t a = 25 c v out(nom) = 2.1 v 140 160 180 200 220 240 260 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 output current (a) figure 10. ground current vs. output current ground current ( a) v in = 2.5 v v in = 4.0 v v in = 5.5 v v in = 3.0 v v in = 5.0 v c out = 4.7 f t a = 25 c v out(nom) = 2.2 v 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 input voltage (v) figure 11. short current limitation vs. input voltage short current limit (a) v out = 0 v en = v in c out = 4.7 f t a = 25 c v out(nom) = 2.1 v 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 input voltage (v) figure 12. short current limitation vs. input voltage short current limit (a) v out = 0 v en = v in c out = 4.7 f t a = 25 c v out(nom) = 2.2 v 25 c dropout voltage (v) output current (a) figure 13. dropout voltage vs. output current 125 c ? 40 c v en = v in c out = 4.7 f v out(nom) = 2.1 v 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0 0.2 0.4 0.6 0.8 1 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0 0.2 0.4 0.6 0.8 1 dropout voltage (v) output current (a) figure 14. dropout voltage vs. output current v en = v in c out = 4.7 f v out(nom) = 2.2 v 25 c 125 c ? 40 c
NCP706 http://onsemi.com 8 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.0 1.0 2.0 3.0 4.0 5.0 reverse leakage current in shutdown ( a) forced output voltage (v) figure 15. reverse leakage current in shutdown v out(nom) = 2.1 v v out(nom) = 2.2 v v in = 5.5 v v en = 0 c in = c out = 4.7 f t a = 25 c 0 20 40 60 80 100 0.1 1 10 100 1000 psrr (db) frequency (khz) figure 16. psrr vs. frequency & output capacitor c out = 22 f c out = 10 f c out = 4.7 f v in = 2.6 v + 200 v pp modulation i out = 500 ma t a = 25 c v out(nom) = 2.1 v 0 20 40 60 80 100 0.1 1 10 100 1000 psrr (db) frequency (khz) figure 17. psrr vs. frequency & output capacitor c out = 22 f c out = 10 f c out = 4.7 f v in = 2.7 v + 200 v pp modulation i out = 500 ma t a = 25 c v out(nom) = 2.2 v 0 10 20 30 40 50 60 70 80 90 100 0.1 1.0 10 100 1000 psrr (db) frequency (khz) figure 18. psrr vs. frequency & output current i out = 10 ma i out = 100 ma i out = 500 ma v in = 3.7 v + 200 v pp modulation c out = 4.7 f t a = 25 c v out(nom) = 2.1 v 0.1 1 10 100 1000 i out = 10 ma i out = 100 ma i out = 500 ma psrr (db) frequency (khz) figure 19. psrr vs. frequency & output current v in = 3.2 v + 200 v pp modulation c out = 4.7 f t a = 25 c v out(nom) = 2.2 v 0 20 40 60 80 0.0 0.5 1.0 1.5 2.0 2.5 0.01 0.1 1 10 100 1000 c out = 4.7 f c out = 10 f i out = 500 ma v in = 2.7 v t a = 25 c v out(nom) = 2.1 v output noise density ( v/ hz ) frequency (khz) figure 20. output noise density vs. frequency
NCP706 http://onsemi.com 9 typical characteristics c out = 4.7 f c out = 10 f i out = 500 ma v in = 2.6 v t a = 25 c v out(nom) = 2.2 v output noise density ( v/ hz ) frequency (khz) figure 21. output noise density vs. frequency 0.0 0.5 1.0 1.5 2.0 2.5 0.01 0.1 1 10 100 1000 figure 22. turn ? on by coupled input and enable pins figure 23. turn ? on by coupled input and enable pins figure 24. turn ? on by enable signal figure 25. turn ? on by enable signal
NCP706 http://onsemi.com 10 typical characteristics figure 26. line transient response figure 27. line transient response figure 28. load transient response figure 29. load transient response
NCP706 http://onsemi.com 11 applications information input decoupling (cin) a 4.7 f capacitor either ceramic or tantalum is recommended and should be connected as close as possible to the pins of NCP706 device. higher values and lower esr will improve the overall line transient response. output decoupling (cout) the minimum decoupling value is 4.7 f and can be augmented to fulfill stringent load transient requirements. the regulator accepts ceramic chip capacitors mlcc. if a tantalum capacitor is used, and its esr is large, the loop oscillation may result. larger values improve noise rejection and psrr. enable operation the enable pin en will turn on or off the regulator. these limits of threshold are covered in the electrical specification section of this data sheet. if the enable is not used then the pin should be connected to v in . hints please be sure the v in and gnd lines are suf ficiently wide. if their impedance is high, noise pickup or unstable operation may result. set external components, especially the output capacitor, as close as possible to the circuit. the sense pin sns trace is recommended to be kept as far from noisy power traces as possible and as close to load as possible. thermal as power across the NCP706 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and also the ambient temperature affect the rate of temperature rise for the part. this is stating that when the NCP706 has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power dissipation. the power dissipation across the device can be roughly represented by the equation: p d v in v out *i out [w] (eq. 1) the maximum power dissipation depends on the thermal resistance of the case and circuit board, the temperature differential between the junction and ambient, pcb orientation and the rate of air flow. the maximum allowable power dissipation can be calculated using the following equation: p max t j t a ja [w] (eq. 2) where ( t j ? t a ) is the temperature differential between the junction and the surrounding environment and ja is the thermal resistance from the junction to the ambient. connecting the exposed pad and non connected pin 3 to a large ground pad or plane helps to conduct away heat and improves thermal relief. ordering information device nominal ooutput voltage marking package shipping ? NCP706mx21tag 2.1 v qm xdfn8 (pb ? free) 3000 / tape & reel NCP706mx22tag 2.2 v qr xdfn8 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCP706 http://onsemi.com 12 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. coplanarity applies to the exposed pad as well as the terminals. a seating plane 0.10 c a3 a1 2x 2x 0.10 c xdfn8 1.6x1.2, 0.4p case 711as issue o dim a min max millimeters 0.35 0.45 a1 0.00 0.05 a3 0.125 ref b 0.13 0.23 d e l1 d2 pin one identifier 0.08 c 0.10 c a 0.10 c e b b 4 8 8x 1 5 0.05 c mounting footprint* e2 1.60 bsc 1.20 bsc 0.05 ref 1.20 1.40 0.20 0.40 bottom view l 8x dimensions: millimeters 0.35 8x 0.26 8x 1.40 0.40 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. note 3 l 0.15 0.25 top view b side view recommended 0.44 a d e 8x e/2 e2 d2 1.44 package outline 1 detail b c detail a l1 detail a l alternate terminal constructions l ?? 0.40 bsc on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NCP706/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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